DocumentCode
2780376
Title
Trading off static power and dynamic performance in CMOS digital circuits: bulk versus double gate SOI MOSFETs
Author
Agostinelli, M. ; Alioto, M. ; Esseni, D. ; Selmi, L.
Author_Institution
DIEGM, Udine
fYear
2007
fDate
11-13 Sept. 2007
Firstpage
191
Lastpage
194
Abstract
This paper investigates with a mixed device/circuit simulation methodology the effectiveness of DG SOI MOSFETs compared to conventional bulk MOSFETs for the implementation of low standby power circuit techniques. Our results indicate that DG MOSFETs offer significant advantages essentially because of the larger V T sensitivity to back-biasing.
Keywords
CMOS digital integrated circuits; MOSFET circuits; integrated circuit modelling; CMOS digital circuits; back-biasing sensitivity; bulk MOSFET; circuit simulation; double gate SOI MOSFET; low standby power circuit technique; mixed device; static power-dynamic performance trade off; CMOS digital integrated circuits; CMOS technology; Circuit simulation; Circuit testing; Digital circuits; Doping; Gate leakage; MOSFETs; Paper technology; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European
Conference_Location
Munich
ISSN
1930-8876
Print_ISBN
978-1-4244-1123-8
Electronic_ISBN
1930-8876
Type
conf
DOI
10.1109/ESSDERC.2007.4430911
Filename
4430911
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