• DocumentCode
    2780509
  • Title

    Method of moment reaction analysis in stripline circuits

  • Author

    Kabir, Sutirtha ; Dvorak, Steven L. ; Prince, John L.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    225
  • Lastpage
    228
  • Abstract
    At high frequencies, great care must be taken with physical layout and interconnects in order to minimize the parasitics. This often means minimizing the number of vias by using embedded passives. Furthermore, whereas circuit designs and layouts utilize a two-dimensional concept at present, novel three-dimensional circuit design concepts must be adopted in future in order to minimize real estate use and achieve low inductance circuit designs. An important enabling technology for the realization of such systems is an electromagnetic modeling tool capable of providing the computational efficiency necessary for design iteration in a three-dimensional conductor layout. In this paper, a novel full-wave simulator is first discussed and then employed in the study of coupling in a stripline structure
  • Keywords
    circuit CAD; circuit analysis computing; circuit layout CAD; coupled transmission lines; electromagnetic coupling; electromagnetic field theory; interconnections; method of moments; strip line circuits; 2D design concept; 3D circuit design concepts; 3D conductor layout; circuit design; circuit layout; computational efficiency; design iteration; electromagnetic modeling tool; embedded passives; full-wave simulator; inductance; interconnects; method of moment reaction analysis; parasitics; physical layout; real estate use minimization; stripline circuits; stripline structure coupling; via minimization; Circuit analysis; Circuit synthesis; Computational efficiency; Conductors; Electromagnetic modeling; Frequency; Inductance; Integrated circuit interconnections; Moment methods; Stripline;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging, 2000, IEEE Conference on.
  • Conference_Location
    Scottsdale, AZ
  • Print_ISBN
    0-7803-6450-3
  • Type

    conf

  • DOI
    10.1109/EPEP.2000.895533
  • Filename
    895533