DocumentCode
2780610
Title
Adaptive on-chip oscillator for FPGA based synchronous designs
Author
Zafar, Y. ; Ahmad, M.M.
fYear
2005
fDate
17-18 Sept. 2005
Firstpage
295
Lastpage
300
Abstract
A single inverter ring oscillator (SIRO) implementation in field programmable gate arrays (FPGAs), serving the purpose of on-chip oscillator driving co-existing clocked circuits is presented. The property of SIRO to adapt to the FPGA technology by automatic frequency adjustment always ensures optimal performance of synchronous circuit. Externally clocked circuits upon FPGA technology variation require a change in oscillating source for optimal performance, whereas SIRO-based on-chip oscillator provides platform independence, without power overhead. In addition, a clocked circuit driven by the on-chip oscillator has greater electromagnetic compatibility (EMC), as compared to the externally clocked one.
Keywords
electromagnetic compatibility; field programmable gate arrays; invertors; oscillators; EMC; FPGA based synchronous designs; adaptive on-chip oscillator; automatic frequency adjustment; clocked circuits; electromagnetic compatibility; field programmable gate arrays; power overhead; single inverter ring oscillator; Circuits; Clocks; Delay; Electromagnetic compatibility; Field programmable gate arrays; Frequency; Hardware design languages; Inverters; Latches; Ring oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging Technologies, 2005. Proceedings of the IEEE Symposium on
Print_ISBN
0-7803-9247-7
Type
conf
DOI
10.1109/ICET.2005.1558897
Filename
1558897
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