DocumentCode
2780716
Title
Embedded FLASH memory thermal budget impact on core CMOS 90nm devices
Author
Carrère, J-P ; Larman, F. ; van der Vegt, E. ; Bocat, M. ; Auriac, N. ; Cherault, N. ; Charleux, M. ; Rochereau, K. ; Hopstaken, M. ; Pantel, R. ; Boter, D. ; Dormans, D.
Author_Institution
STMicroelectron., Crolles
fYear
2007
fDate
11-13 Sept. 2007
Firstpage
263
Lastpage
266
Abstract
In an embedded FLASH 90 nm technology, core devices behavior is modified by the thermal budget needed to process the specific FLASH dielectrics. When these steps are performed after the logic poly deposition, we observe two main kinds of changes: first the substrate doping is modified due to diffusion and segregation effects. Then, the poly morphology changes, this leads to larger poly grain size and gate doping change. To limit these effects and maintain the full compatibility with CMOS logic, thermal budget limitations are finally presented.
Keywords
CMOS memory circuits; doping; flash memories; CMOS logic; embedded flash memory; logic poly deposition; size 90 nm; substrate doping; thermal budget; CMOS logic circuits; CMOS process; CMOS technology; Dielectric devices; Doping profiles; Flash memory; Indium; Logic devices; MOS devices; Nonvolatile memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European
Conference_Location
Munich
ISSN
1930-8876
Print_ISBN
978-1-4244-1123-8
Electronic_ISBN
1930-8876
Type
conf
DOI
10.1109/ESSDERC.2007.4430928
Filename
4430928
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