A micro-power CMOS switched-capacitor instrumentation amplifier

Author

Zadeh, Ali E.

Author_Institution

Siemens Pacesetter Inc., Sylmar, CA, USA

Volume

1

fYear

1994

fDate

3-5 Aug 1994

Firstpage

19

Abstract

This paper presents realization of a switched capacitor instrumentation amplifier using a multiple input operational amplifier (MIOA). The amplifier offset is eliminated using two distinct phases: an auto-zeroing phase and a correction phase. Furthermore, charge injection induced offset is greatly attenuated using both desensitized input pair of the MIOA and using differential balancing method. The circuit is designed in a standard P-well, double polysilicon double metal 2 μm CMOS process and is expected to have less than 100 μV of offset. Using a 3 V power supply, 10 kHz clock frequency, and 20 pF output load capacitance, the amplifier consumes less than 6.5 μA

Keywords

CMOS analogue integrated circuits; capacitance; instrumentation amplifiers; integrated circuit design; operational amplifiers; switched capacitor networks; 10 kHz; 2 micron; 20 pF; 3 V; 6.5 muA; P-well double-polysilicon double-metal CMOS; auto-zeroing phase; charge injection induced offset; clock frequency; correction phase; desensitized input pair; differential balancing method; micropower CMOS; multiple input operational amplifier; output load capacitance; switched-capacitor instrumentation amplifier; CMOS process; Capacitance; Capacitors; Circuits; Clocks; Frequency; Instruments; Operational amplifiers; Power amplifiers; Power supplies;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on

Conference_Location

Lafayette, LA

Print_ISBN

0-7803-2428-5

Type

conf

DOI

10.1109/MWSCAS.1994.519181

Filename

519181