DocumentCode
2780852
Title
CPAM: a common power analysis methodology for high-performance VLSI design
Author
Neely, J. Scott ; Chen, Howard H. ; Walker, Steven G. ; Venuto, James ; Bucelot, T.J.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2000
fDate
2000
Firstpage
303
Lastpage
306
Abstract
A common power analysis methodology has been developed to estimate on-chip thermal power, identify potential electromigration problems, and minimize power supply noise. Comprehensive analysis results from CPAM provide the critical data needed to improve system performance and reliability for high-end processor design
Keywords
VLSI; circuit CAD; circuit simulation; electromigration; integrated circuit design; integrated circuit interconnections; integrated circuit metallisation; integrated circuit noise; integrated circuit reliability; microprocessor chips; CPAM; VLSI design; common power analysis methodology; electromigration; on-chip thermal power; power supply noise minimization; processor design; system performance; system reliability; Analytical models; Circuit noise; Circuit simulation; Clocks; Data mining; Electromigration; Performance analysis; Power measurement; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2000, IEEE Conference on.
Conference_Location
Scottsdale, AZ
Print_ISBN
0-7803-6450-3
Type
conf
DOI
10.1109/EPEP.2000.895550
Filename
895550
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