Title :
Multi-line crosstalk and common-mode noise analysis
Author :
Deutsch, A. ; Smith, H.H. ; Kopcsay, G.V. ; Krauter, B.L. ; Surovic, C.W. ; Coteus, P.W.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
The rapid increase in integration level and GHz clock rates are placing increasing demands on the on-chip interconnections for large chips that now contain a substantial portion of the total system. In this environment, noise containment is becoming increasingly difficult. Experimental verification is presented of a multi-line synthesis approach for crosstalk and common-mode noise evaluation. The need for proper accounting of the frequency-dependent current distribution through the finite impedance of the reference conductors is highlighted with examples of wide data-bus structures
Keywords :
crosstalk; current distribution; electric impedance; integrated circuit design; integrated circuit interconnections; integrated circuit measurement; integrated circuit noise; integrated circuit reliability; clock rates; common-mode noise analysis; common-mode noise evaluation; crosstalk; data-bus structures; finite impedance; frequency-dependent current distribution; integration level; multi-line crosstalk; multi-line synthesis approach; noise containment; on-chip interconnections; reference conductors; system chips; Circuit noise; Clocks; Conductors; Crosstalk; Frequency; Impedance; Integrated circuit interconnections; Noise reduction; Voltage; Working environment noise;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2000, IEEE Conference on.
Conference_Location :
Scottsdale, AZ
Print_ISBN :
0-7803-6450-3
DOI :
10.1109/EPEP.2000.895553
