Embedded hardware/software verification and validation using hardware-in-the-loop simulation

Embedded systems verification and validation practice emphasis exhaustive worst case analysis. In this paper the authors have described procedures of an extended hardware-in-the-loop (HIL) simulation setup testing process for the verification and validation of embedded hardware and software. Extended HIL setup architecture including real time system, controller hardware and data acquisition setup for real time data receiving has been focused. The paper presents time synchronization of real time system running simulation models and the controlling computer executing control logic. Real-time control parameters extraction procedures have been covered which is used for analysis and comparison so as to verify control logic implementation. FLASH based method for hardware and software verification is explored and the use of hardware in loop technology for testing and verification of controller interfaces is presented.