`Configurable array logic technology at the chip and board level´

Configurable Array Logic (CAL) is a generic implementation technology for custom computers (in which computations are performed directly using gate level primitives rather than by a processor interpreting an instruction sequence) and ASICs. CAL provides function and communications resources in an array of cells. Cell resources can be assigned to combinations of storage, logic functions and connections (wires) by writing through a parallel interface to a conventional SRAM control store. Structures of different sizes and shapes can be made by connecting chips together nearest neighbour fashion to form arbitrary sized arrays. To the designer the system appears to be a large homogeneous array of cells. The architecture allows for dynamic reconfiguration of the control store while computations are proceeding and for monitoring internal signals by reading back bits of control store. Access time to configuration memory is comparable to catalogue SRAM parts