Low voltage hot-carrier programming of ultra-scaled SOI finflash memories

Author

Razafmdramora, J. ; Perniola, L. ; Jahan, C. ; Scheiblin, P. ; Gely, M. ; Vizioz, C. ; Carabasse, C. ; Boulanger, Frederic ; De Salvo, B. ; Deleonibus, Simon ; Lombardo, Salvatore ; Bongiorno, C.

Author_Institution

CEA LETI-MINATEC, Grenoble

fYear

2007

fDate

11-13 Sept. 2007

Firstpage

414

Lastpage

417

Abstract

In this paper, we present a deep investigation of ultra-scaled Finflash memories, fabricated on Silicon on Insulator (SOI) substrate, with Silicon NanoCrystal (Si-NC) or nitride layers acting as storage nodes. Electrical characteristics of devices with channel length (L_G) as short as 30 nm, and fin width (W_FIN) as narrow as 10 nm are shown. Effective Channel Hot Electron (CHE) writing with sub-3.2 V drain biases (i.e. DeltaV_TH=3V at V_G/V_D/t_stress=9V/2.5V/100 mus), as well as Hot Hole Injection (HHI) erasing with sub-4.5V drain biases are demonstrated. Finally, fully three dimensional Monte Carlo simulations, coupled with an original semi-analytical approach, allow us to give a qualitative explanation of the obtained experimental data.

Keywords

Monte Carlo methods; flash memories; hot carriers; silicon-on-insulator; substrates; 3D Monte Carlo simulation; channel hot electron writing; hot hole injection erasing; low voltage hot-carrier programming; nitride layers; silicon nanocrystal; silicon on insulator substrate; ultra-scaled SOI finflash memories; Channel hot electron injection; Electric variables; Etching; Fabrication; Hot carriers; Low voltage; Nanocrystals; Silicon on insulator technology; Threshold voltage; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European

Conference_Location

Munich

ISSN

1930-8876

Print_ISBN

978-1-4244-1123-8

Electronic_ISBN

1930-8876

Type

conf

DOI

10.1109/ESSDERC.2007.4430966

Filename

4430966