Title :
A backside via holes etching technology for indium phosphide MMICs
Author :
Li, Fuxiao ; Post, G. ; Nissim, Y. ; Falcou, A. ; Courbet, C. ; Sanchez, S. ; Scavennec, A.
Author_Institution :
Nanjing Electron. Devices Inst., China
Abstract :
A wet etching process for backside via holes suitable for use on InP MMICs technologies has been developed for an indium phosphide substrate. PMMA was used to mount the InP wafer onto a glass carrier. Sputtered Ta film was utilized as etch mask. HCl/H3PO4 solution realised a etch until a depth of 100 μm. It has been demonstrated that the wet etching backside process is controllable with large latitudes
Keywords :
III-V semiconductors; MMIC; etching; indium compounds; integrated circuit technology; 100 micron; H3PO4; HCl; HCl/H3PO4 solution; InP; InP MMICs; InP substrate; PMMA adhesive; Ta; Ta film etch mask; backside via holes etching technology; glass carrier; sputtered Ta film; wet etching process; Dry etching; Gallium arsenide; Glass; Indium phosphide; MMICs; Plasma applications; Plasma temperature; Sputter etching; Substrates; Wet etching;
Conference_Titel :
Microwave and Millimeter Wave Technology, 2000, 2nd International Conference on. ICMMT 2000
Conference_Location :
Beijing
Print_ISBN :
0-7803-5743-4
DOI :
10.1109/ICMMT.2000.895621
