A novel asymmetric optical interconnection network architecture for network-on-chip

As high performance multi-cores processor develops rapidly, highly integrated network-on-chip (NoC) for data interchange between the cores is needed. The traditional electrical NoC can hardly catch up with the steps of the demand of higher bandwidth, lower power consumption, lower latency and etc. However, the introduction of optical interconnection opens a new way to improve the performance of NoC, and many recent research achievements have promoted the development of the optical network-on-chip (ONoC). This paper proposes a novel asymmetric ONoC architecture constructed by the novel all-direction (AD) or limited-direction (LD) switching units. This novel AD/LD switching unit is composed of a key component: micro-resonator. We analyze and compare the performance of this novel asymmetric ONoC with other ONoC designed lately based on micro-resonator. The result shows that this asymmetric ONoC with AD/LD switching units can save at least 12%/32% of the micro-resonators. As a result the area and the power consumption can also be reduced.