Fast FIR filter implementation using high-level synthesis tools

Author

Ogunfunmi, Tokunbo ; Desai, Shailendra

Author_Institution

Santa Clara Univ., CA, USA

Volume

1

fYear

1994

fDate

3-5 Aug 1994

Firstpage

58

Abstract

In this paper, we present the design and VLSI implementation of “fast” finite impulse response (FIR) filter using Synopsys high-level synthesis tools. The “fast” FIR method is efficient in that it reduces the amount of computation by decomposing the input data before filtering thereby reducing the length of the filter to be implemented. We also compare this method of implementation with the conventional methods. Our results are very encouraging and this project exercises the set of high-level synthesis tools for a digital signal processing chip design application

Keywords

FIR filters; VLSI; high level synthesis; integrated circuit design; Synopsys high-level synthesis tool; VLSI; computation; data decomposition; design; digital signal processing chip; fast FIR filter; finite impulse response filter; Digital signal processing; Equations; Filtering; Finite impulse response filter; Hardware design languages; High level synthesis; Large scale integration; Logic design; Signal design; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on

Conference_Location

Lafayette, LA

Print_ISBN

0-7803-2428-5

Type

conf

DOI

10.1109/MWSCAS.1994.519190

Filename

519190