Title :
On synthesizing and identifying stuck-open testable CMOS combinational circuits
Author :
Chakravarty, Sreejit
Author_Institution :
Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA
Abstract :
It is shown that a class of CMOS circuits is a testable realization and static CMOS circuits synthesized by some existing synthesis systems belong to this class. A more `direct´ solution is proposed to the problem of computing robust test-pairs for stuck-open faults by defining a new six-valued logic. This in turn gives a solution to the problem of identifying stuck-open testable circuits
Keywords :
CMOS integrated circuits; combinatorial circuits; logic testing; CMOS combinational circuits; six-valued logic; stuck-open faults; stuck-open testable circuits; synthesis systems; synthesized; testable; Boolean functions; CMOS logic circuits; Circuit faults; Circuit synthesis; Circuit testing; Combinational circuits; Input variables; Logic testing; Robustness; System testing;
Conference_Titel :
Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE
Conference_Location :
Orlando, FL
Print_ISBN :
0-89791-363-9
DOI :
10.1109/DAC.1990.114951
