Title :
Design for Manufacturability and its Role in Enhancing Stress Migration Reliability of Porous Ultra Low-k Copper Interconnects
Author :
Lim, Y.K. ; Pey, K.L. ; Lee, P.S. ; Lee, Y.H. ; Kamat, N.R. ; Tan, J.B. ; Fu, Tao ; Hsia, L.C.
Author_Institution :
Chartered Semicond. Manuf. Ltd., Singapore
Abstract :
The integration of copper (Cu) and low-k dielectrics has posed challenges for stress migration (SM) reliability. Besides process tuning, design for manufacturability (DFM) approach is proposed to suppress stress-induced void failures. In this paper, a three-dimensional (3D) finite element analysis (FEA) simulation model was used to identify the main mechanisms of several key processes and design approaches responsible for SM reliability improvement reported in the literature. On the basis of understanding the critical parameters and design/structural weak points affecting SM reliability, DFM is proposed to enhance the SM reliability of future nanoscale technologies employing porous ultra low-k dielectrics. The study illustrates the importance of process and design interactions to make porous ultra low-k Cu interconnects more resilient to SM degradation for future CMOS technologies.
Keywords :
CMOS integrated circuits; copper; design for manufacture; finite element analysis; integrated circuit interconnections; low-k dielectric thin films; reliability; 3D finite element analysis; CMOS technology; Cu; design for manufacturability; low-k dielectrics; nanoscale technologies; porous ultra low-k copper interconnects; stress migration reliability; stress-induced void failures; Analytical models; CMOS technology; Copper; Design for manufacture; Dielectrics; Finite element methods; Manufacturing processes; Process design; Samarium; Stress;
Conference_Titel :
Reliability physics symposium, 2007. proceedings. 45th annual. ieee international
Conference_Location :
Phoenix, AZ
Print_ISBN :
1-4244-0919-5
Electronic_ISBN :
1-4244-0919-5
DOI :
10.1109/RELPHY.2007.369882
