Title :
VLSI design and implementation of a discrete cosine transform chip for video compression using high level synthesis tools
Author :
Subramani, Nandini ; Ogunfunmi, T.
Author_Institution :
BusLogic Inc., Santa Clara, CA, USA
Abstract :
A new implementation for computing a Discrete Cosine Transform (DCT) is presented. A DCT chip is designed using a Hardware Description Language viz. Verilog. The DCT chip designed is based on algorithms which can be implemented using Distributed Arithmetic. The results of these parallel processes are then combined to obtain the DCT. This implementation enables evaluation of the algorithm in a functional or behavioral form. The netlist of the DCT chip is obtained using Cadence Synthesis tools
Keywords :
VLSI; data compression; digital arithmetic; digital signal processing chips; discrete cosine transforms; hardware description languages; high level synthesis; integrated circuit design; video coding; VLSI design; Verilog; algorithm; cadence synthesis; discrete cosine transform chip; distributed arithmetic; hardware description language; high level synthesis; netlist; video compression; Algorithm design and analysis; Arithmetic; Discrete cosine transforms; Distributed computing; Equations; Hardware design languages; High level synthesis; Petroleum; Very large scale integration; Video compression;
Conference_Titel :
Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-7803-2428-5
DOI :
10.1109/MWSCAS.1994.519192
