DocumentCode
278290
Title
A dynamically reconfigurable parallel pipelined system for real-time image processing applications
Author
Hayat, L. ; Sandler, Mark B.
Author_Institution
Dept. of Electron. & Electr. Eng., King´´s Coll. London, UK
fYear
1991
fDate
33350
Firstpage
42522
Lastpage
42525
Abstract
An architecture of a dynamically reconfigurable, multidimensional multidirectional parallel pipelined (M 2P 2) system is presented for real time image processing applications. It is implemented as a chain of interconnected modules, each having high performance TMS320c25 processing elements (PEs). These PEs can be configured to operate as independent stages of a single pipeline or grouped into two or four multiprocessor pipeline stages. Also, different stages need not comprise an equal number of PEs. Rather, each stage is configured according to the processing requirement of that stage. This results in a highly efficient pipeline structure having optimum task division. The configuration of pipeline stages can be done under software control
Keywords
computerised picture processing; parallel architectures; real-time systems; TMS320c25 processing elements; dynamically reconfigurable; multidimensional; multidirectional; parallel pipelined system; real-time image processing;
fLanguage
English
Publisher
iet
Conference_Titel
Parallel Architectures for Image Processing Applications, IEE Colloquium on
Conference_Location
London
Type
conf
Filename
181500
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