• DocumentCode
    2782934
  • Title

    Development methodology of ASIP based on Java byte code using HW/SW co-design system for processor design

  • Author

    Yanagisawa, Hideaki ; Uehara, Minoru ; Mori, Hideki

  • Author_Institution
    Dept. of Inf. & Comput. Sci., Toyo Univ., Saitama, Japan
  • fYear
    2004
  • fDate
    23-24 March 2004
  • Firstpage
    831
  • Lastpage
    837
  • Abstract
    To develop an ASIP (application specific instruction set processor), development of HW (hardware) and development of SWDE (software development environments) are required. Separate develops of HW and SWDE in a short time are difficult. So HW/SW codesign system is necessary rapid develop of ASIPs. We have developed C-DASH(c-like design automation shell), which is a HW/SW codesign system for designing processors based on ISA (instruction set architecture). We describe the HW/SW codesign system C-DASH, along with a description of a Java processor that directly executes Java byte code is given as an example.
  • Keywords
    Java; hardware-software codesign; instruction sets; software engineering; C-DASH; HW/SW co-design system; Java byte code; Java processor; application specific instruction set processor; processor design; software development environments; Application software; Application specific processors; Computer architecture; Design automation; Embedded system; Hardware; Instruction sets; Java; Process design; Programming;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Distributed Computing Systems Workshops, 2004. Proceedings. 24th International Conference on
  • Print_ISBN
    0-7695-2087-1
  • Type

    conf

  • DOI
    10.1109/ICDCSW.2004.1284129
  • Filename
    1284129