Title :
A systemC-based modular design and verification framework for C-model reuse in a HW/SW-codesign design flow
Author_Institution :
Dept. of Comput. Sci., Hamburg Univ., Germany
Abstract :
Rising the level of abstraction in system modelling allows early verification of the system functionality, reducing the risk of long redesign cycles. Moving to a new flow introducing systemC as SDL allows the reuse of existing high-level C-models. A framework is presented that allows C-model integration and the connection of modules located at different levels of abstraction without the need to implement the communication or introduce adaptors to translate between the abstraction levels. The focus of the approach lies on high acceptance by the designers coming from a C and HDL based top-down design methodology.
Keywords :
C language; formal verification; hardware description languages; hardware-software codesign; C-model integration; HW/SW-codesign; hardware description language; high-level C-models; system modeling; systemC-based modular design; top-down design methodology; verification framework; Computer science; Concurrent computing; Design methodology; Electrical equipment industry; Embedded software; Hardware design languages; Industrial control; Process design; Software systems; Time to market;
Conference_Titel :
Distributed Computing Systems Workshops, 2004. Proceedings. 24th International Conference on
Print_ISBN :
0-7695-2087-1
DOI :
10.1109/ICDCSW.2004.1284130