DocumentCode
2783204
Title
A phase locked loop used as a digitally-controlled oscillator for flexible frequency synthesis
Author
Caram, Juan Pablo ; Kenney, J. Stevenson ; Galloway, Jeff
Author_Institution
Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2015
fDate
13-15 April 2015
Firstpage
1
Lastpage
3
Abstract
An all-digital phase locked loop (ADPLL) that uses a second fractional-N PLL as its digitally-controlled oscillator (DCO) has been studied, prototyped and tested. This technique allows for an effective implementation of a low-bandwidth ADPLL, exploiting the benefits of a digital implementation while avoiding the complexity of designing a DCO and a Time-to-digital converter (TDC). The reuse of a PLL as a DCO provides for easy interfacing, high linearity, zero drift and very high frequency resolution. An overview of the theory, technique, limitations, applications, and results are presented in this paper.
Keywords
digital phase locked loops; frequency synthesizers; phase locked oscillators; all-digital phase locked loop; digitally controlled oscillator; flexible frequency synthesis; second fractional-N PLL; time-to-digital converter; Clocks; Phase locked loops; Switches; Voltage-controlled oscillators; Weaving; All-digital phase locked loop (ADPLL); Digitally-controlled oscillator (DCO); Sigma-Delta modulation (SDM);
fLanguage
English
Publisher
ieee
Conference_Titel
Wireless and Microwave Technology Conference (WAMICON), 2015 IEEE 16th Annual
Conference_Location
Cocoa Beach, FL
Type
conf
DOI
10.1109/WAMICON.2015.7120368
Filename
7120368
Link To Document