Layout considerations in power amplifiers with negative parallel feedback

Author

Paulo, Robert ; Testa, Paolo Valerio ; Tzschoppe, Christoph ; Wagner, Jens ; Ellinger, Frank

Author_Institution

Tech. Univ. Dresden, Dresden, Germany

fYear

2015

fDate

13-15 April 2015

Firstpage

1

Lastpage

5

Abstract

In this paper, we discuss layout problems encountered in power amplifiers with negative parallel feedback. We show how to reduce the risk of an unstable power amplifier (PA) by careful layouting without the use of additional elements and thus chip area. Optimised vs. non-optimised layouting are compared and verified with fabricated ICs. Finally a PA with large signal bandwidth of 1.9 GHz at a design frequency of 2.6 GHz using negative feedback in a standard 250 nm BiCMOS technology is introduced. An efficiency of 34% and an output power of 26.9dBm at the 1 dB compression point were measured.

Keywords

BiCMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; integrated circuit layout; BiCMOS technology; ICs; PA; bandwidth 1.9 GHz; efficiency 34 percent; frequency 2.6 GHz; negative parallel feedback; nonoptimised layouting problem; optimised layouting problem; power amplifiers; size 250 nm; BiCMOS integrated circuits; Gain; Harmonic analysis; Indexes; Oscillators; Topology; RF power amplifier; broadband applications; power added efficiency;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless and Microwave Technology Conference (WAMICON), 2015 IEEE 16th Annual

Conference_Location

Cocoa Beach, FL

Type

conf

DOI

10.1109/WAMICON.2015.7120403

Filename

7120403