Power Delivery for Nanoscale Processors with Single Wall Carbon Nanotube Interconnects

In this paper we present a quantitative analysis of the use of metallic, single wall carbon nanotube (mSWCNT) bundles in future power delivery applications for nanoscale processors. We consider several factors which have been neglected in recent works (i.e. improvements in materials, limitations of nanotube packing density, increase of mSWCNT resistance with applied bias). mSWCNTs will not be effective for replacement of short interconnect lengths (< 1μm). However, for interconnect lengths in excess of 10μm, mSWCNT bundles can exhibit a lower resistance than their metal counterparts for high density mSWCNT packing (wall-to-wall separation of less than 2nm).