The Influence of Gate Poly-Silicon Oxidation on Negative Bias Temperature Instability in 3D FinFET

Author

Lee, Hyunjin ; Lee, Choong-Ho ; Park, Donggun ; Choi, Yang-Kyu

Author_Institution

Dept. of EECS, Korea Adv. Inst. of Sci. & Technol., Daejeon

fYear

2007

fDate

15-19 April 2007

Firstpage

680

Lastpage

681

Abstract

This paper presents the effects of gate poly-silicon oxidation (GPOX) on negative bias temperature instability (NBTI) in buried channel body-tied and SOI FinFETs for the first time using a measurement technique without a recovery during a NBT-stress test. Gate length dependency of the NBTI on FinFETs with GPOX is analyzed with various gate oxide thicknesses, stress biases, substrate biases, and device structures. In addition, the proposed revamped geometry-aware reaction-diffusion model explains the GPOX effects on 3D FinFET with gate length dependency.

Keywords

MOSFET; oxidation; semiconductor device models; semiconductor device reliability; silicon-on-insulator; 3D FinFET; SOI FinFET; gate length dependency; gate poly-silicon oxidation; negative bias temperature instability; revamped geometry-aware reaction-diffusion model; Degradation; FinFETs; Hydrogen; Measurement techniques; Negative bias temperature instability; Niobium compounds; Oxidation; Solid modeling; Stress; Titanium compounds; FinFET; GPOX; NBTI; On-the-fly; gate length dependency;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability physics symposium, 2007. proceedings. 45th annual. ieee international

Conference_Location

Phoenix, AZ

Print_ISBN

1-4244-0919-5

Electronic_ISBN

1-4244-0919-5

Type

conf

DOI

10.1109/RELPHY.2007.369567

Filename

4227751