DocumentCode
2785266
Title
A 1.5 V four-quadrant analog multiplier
Author
Coban, Abdulkerim L. ; Allen, Phillip E.
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume
1
fYear
1994
fDate
3-5 Aug 1994
Firstpage
117
Abstract
A CMOS four-quadrant analog multiplier that can operate from a supply voltage of 1.5 V with ±250 mV differential input voltage range is described. The multiplier requires two linear transconductors whose input transistors are operated in their linear region. Both experimental and simulation results are given for the circuit fabricated in a standard, digital, 2 μm, p-well CMOS process
Keywords
CMOS analogue integrated circuits; analogue multipliers; -250 to 250 mV; 1.5 V; 2 micron; four-quadrant analog multiplier; linear transconductors; p-well CMOS process; single supply operation; Analog computers; CMOS process; CMOS technology; Circuit simulation; Equations; Harmonic distortion; MOSFET circuits; Signal processing; Threshold voltage; Transconductors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on
Conference_Location
Lafayette, LA
Print_ISBN
0-7803-2428-5
Type
conf
DOI
10.1109/MWSCAS.1994.519203
Filename
519203
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