Title :
3-D stacking using the GE high density multichip module technology
Author :
Fillion, R.A. ; Saia, R. ; Wojnarowski, R.J. ; Forman, G.A. ; Gorowitz, B.
Author_Institution :
Geneml Electric Company
Keywords :
Delay; Fabrication; Integrated circuit interconnections; Multichip modules; Packaging; Performance loss; Power system interconnection; Research and development; Rivers; Stacking;
Conference_Titel :
MCM and VLSI Packaging Techniques and Manufacturing Technologies, 1994. Workshop on
DOI :
10.1109/WPTMT.1994.763543
