ASC-Based Acceleration in an FPGA with a Processor Core Using Software-Only Skills

Author

Fiksman, Evgeny ; Birk, Yitzhak ; Mencer, Oskar

Author_Institution

Dept. of Electr. Eng., Technion-Israel Inst. of Technol., Haifa

fYear

2006

fDate

24-26 April 2006

Firstpage

271

Lastpage

272

Abstract

A stream compiler (ASC) generates net lists for hardware (FPGA) accelerators from C-like descriptions, obviating the need for hardware skills. The authors present a backend adapter that enables integration of such accelerators with a processor core in the same FPGA. Development of hybrid ASC-accelerated applications using software-only skills is thus made possible, as illustrated by a hybrid power-conscious iDCT implementation

Keywords

C++ language; field programmable gate arrays; program compilers; A stream compiler; ASC acceleration; C-like descriptions; FPGA; backend adapter; hardware accelerators; hybrid power-conscious; iDCT implementation; processor core; software-only skill; Acceleration; Application software; Clocks; Educational institutions; Engines; Field programmable gate arrays; Hardware; Power engineering computing; Power generation; Software tools;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on

Conference_Location

Napa, CA

Print_ISBN

0-7695-2661-6

Type

conf

DOI

10.1109/FCCM.2006.26

Filename

4020915

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2786220