Title :
A Task Graph Approach for Efficient Exploitation of Reconfiguration in Dynamically Reconfigurable Systems
Author :
Papademetriou, Kyprianos ; Dollas, Apostolos
Author_Institution :
Dept. of Electron. & Comput. Eng., Crete Tech. Univ., Chania
Abstract :
Partial reconfiguration suffers from the inherent high latency and low throughput which is more considerable when reconfiguration is performed on-demand. This work deals with this overhead in processors combining a fixed processing unit (FPU), and a reconfigurable processing unit (RPU). Static and dynamic prefetching (Li, 2002), and instruction forecasting (Iliopoulos and Antonakopoulos, 2001) are targeting at reduction of the overhead through preloading of configurations. Banerjee et al. (2005) transform the task graph of an application and a heuristic algorithm evaluates the reduction in schedule length and selects the most promising configuration. Tasks are scheduled according to the physical resource constraints. In this work the prefetching model of Li (2002) was augmented by taking into account the hardware area constraints of a partially reconfigurable system. Given the task graph of an application, tasks with low probability to be executed are split and preloaded according to the hardware in order to be fully utilized. Thus, the time during which reconfiguration is overlapped with processor execution is increased
Keywords :
graph theory; reconfigurable architectures; scheduling; storage management; dynamically reconfigurable systems; fixed processing unit; hardware area constraints; partial reconfigurable system; prefetching model; processor overhead; reconfigurable processing unit; task graph; Delay; Hardware; Heuristic algorithms; High performance computing; Prefetching; Scheduling algorithm; Testing; Throughput;
Conference_Titel :
Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on
Conference_Location :
Napa, CA
Print_ISBN :
0-7695-2661-6
DOI :
10.1109/FCCM.2006.19