Intrinsic Hardware Evolution of Neural Networks in Reconfigurable Analogue and Digital Devices

In this paper a genetic algorithm has been developed to evolve a neural network (NN) implementation of a two input XOR function. This GA will subsequently be used to contrast the relative difficulties of implementing the XOR NN on FPGA´s and FPAA´s respectively. Two case studies are presented to demonstrate intrinsic evolution of the XOR network on reconfigurable analogue and digital devices. In both cases the GA evolves the synaptic weights and threshold values for an NN implemented on both field programmable gate array (FPGA) and field programmable analogue array (FPAA) hardware platforms