Title :
A multiprocessor computer system for integrated numeric and symbolic computation
Author :
Goblick, T.J. ; Harmon, P.G. ; Leivent, J.I. ; Olsen, J.J. ; Cogen, D.S. ; DiTuri, J.J. ; McHugh, P.G. ; Walton, R.L.
Author_Institution :
Lincoln Lab., MIT, Lexington, MA, USA
Abstract :
A class of problems, called signal understanding (SU) systems, that involves intensive numeric, as well as symbolic testing, is considered. A shared-memory multiprocessor computer system designed specifically to facilitate the development and evaluation of parallel SU algorithms, which would be a basic tool for developing real-time SU systems, is described. This machine, called the MX-1, runs Common LISP, which has been augmented with extensions for user-directed parallelism. It is, in essence, a parallel LISP machine with digital signal processors (DSPs) integrated into the architecture to provide powerful numeric computational capability. The MX-1 has 16 crossbar interconnected processing nodes, each with a Motorola 68020 CPU operating at 16 MHz, 8 Mbytes of dynamic random-access memory and its own Weitek DSP coprocessor that can do 10 million multiply-accumulate operations per second. High-speed I/O ports are provided for direct entry of sensor data into the DSPs. Two 4-node systems and a 16-node system have been fabricated, and several applications have been run on the systems
Keywords :
LISP; digital signal processing chips; parallel machines; 16 MHz; 16-node system; 4-node systems; 8 MByte; Common LISP; MX-1; Motorola 68020 CPU; Weitek DSP coprocessor; crossbar interconnected processing nodes; digital signal processors; dynamic random-access memory; high speed I/O ports; integrated numeric/symbolic computation; multiply-accumulate operations; parallel LISP machine; parallel algorithms; real time systems; sensor data; shared-memory multiprocessor computer system; signal understanding; user-directed parallelism; Algorithm design and analysis; Computer architecture; Concurrent computing; Digital signal processing; Digital signal processors; Parallel processing; Power system interconnection; Real time systems; Signal processing algorithms; System testing;
Conference_Titel :
Intelligent Control, 1990. Proceedings., 5th IEEE International Symposium on
Conference_Location :
Philadelphia, PA
Print_ISBN :
0-8186-2108-7
DOI :
10.1109/ISIC.1990.128478