DocumentCode
2787518
Title
Row-Buffer Reorganization: Simultaneously Improving Performance and Reducing Energy in DRAMs
Author
Gulur, Nagendra ; Manikantan, R. ; Govindarajan, R. ; Mehendale, Mahesh
fYear
2011
fDate
10-14 Oct. 2011
Firstpage
189
Lastpage
190
Abstract
In this paper, based on the temporal and spatial locality characteristics of memory accesses in multicores, we propose a re-organization of the existing single large row buffer in a DRAM bank into multiple smaller row-buffers. The proposed configuration helps improve the row hit rates and also brings down the energy required for row-activations. The major contribution of this work is proposing such a reorganization without requiring any significant changes to the existing widely accepted DRAM specifications. Our proposed reorganization improves performance by 35.8%, 14.5% and 21.6% in quad, eight and sixteen core workloads along with a 42%, 28% and 31% reduction in DRAM energy. Additionally, we introduce a Need Based Allocation scheme for buffer management that shows additional performance improvement.
Keywords
DRAM chips; DRAM bank; NeedBasedAllocation scheme; buffer management; core workloads; energy reduction; memory accesses; multicores; row-activations; row-buffer reorganization; spatial locality characteristics; temporal locality characteristics; Energy consumption; Multicore processing; Organizations; Phase change memory; Random access memory; Resource management; Standards organizations; DRAM; Multicore; Row-Buffer Organization;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures and Compilation Techniques (PACT), 2011 International Conference on
Conference_Location
Galveston, TX
ISSN
1089-795X
Print_ISBN
978-1-4577-1794-9
Type
conf
DOI
10.1109/PACT.2011.34
Filename
6113809
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