• DocumentCode
    2787567
  • Title

    Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling

  • Author

    Pigorsch, Florian ; Scholl, Christoph ; Disch, Stefan

  • Author_Institution
    Inst. fur Informatik, Albert-Ludwigs-Univ. Freiburg
  • fYear
    2006
  • fDate
    Nov. 2006
  • Firstpage
    89
  • Lastpage
    96
  • Abstract
    In this paper we present a complete method for verifying properties expressed in the temporal logic CTL. In contrast to the majority of verification methods presented in previous years, we support unbounded model checking based on symbolic representations of characteristic functions. Among others, our method is based on an advanced and-inverter graph (AIG) implementation, quantifier scheduling, and BDD sweeping. For several examples, our method outperforms BDD based symbolic model checking by orders of magnitude. However, our approach is also able to produce competitive results for cases where BDD are known to perform well
  • Keywords
    binary decision diagrams; formal verification; graph theory; temporal logic; BDD sweeping; advanced and-inverter graph; advanced unbounded model checking; quantifier scheduling; symbolic representations; temporal logic; Binary decision diagrams; Boolean functions; Data structures; Explosions; Industrial relations; Job shop scheduling; Logic; Processor scheduling; Sequential circuits; Upper bound;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods in Computer Aided Design, 2006. FMCAD '06
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    0-7695-2707-8
  • Type

    conf

  • DOI
    10.1109/FMCAD.2006.4
  • Filename
    4021014