Architectural synthesis of digital filters for ASIC implementation

This paper introduces a new design automation system incorporating specification and architectural synthesis tools, specifically tailored to the implementation of reduced complexity FIR digital filters for fixed function applications. The approach adopted here embodies the primitive operator filter (POF) design methodology which reduces implementation complexity by eliminating the requirement for explicit multiplication operations. All multiplications are replaced by a single directed signal flow graph, employing only primitive operations (addition, subtraction and bit-wise shifts). This flow graph is formed so as to preserve the input-output transfer function for all signals, with no loss of coefficient accuracy and gives a significant reduction in implementation complexity. This in turn allows for greater integration and a wider field of application, in such areas as audio, broadcast, telecommunications and image processing