DocumentCode :
2787865
Title :
An 8-bit 1.5GS/s flash ADC using post-manufacturing statistical selection
Author :
Proesel, Jonathan ; Keskin, Gokce ; Plouchart, Jean-Olivier ; Pileggi, Lawrence
Author_Institution :
Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear :
2010
fDate :
19-22 Sept. 2010
Firstpage :
1
Lastpage :
4
Abstract :
An 8-bit, 1.5GS/s flash ADC is presented. Comparators are digitally calibrated using statistical selection. INL of 1.32 LSB and DNL of 1.23 LSB are achieved. Average comparator noise of 5mVrms (1.3 LSB) limits SNDR to 37dB at low frequencies. Total power is 35mW, 20mW in the S&H and 15mW in the ADC core. The figure of merit is 0.42pJ/conv, the best reported for 1+GS/s, 7+-bit ADCs.
Keywords :
analogue-digital conversion; circuit noise; comparators (circuits); ADC core; comparators; flash ADC; post-manufacturing statistical selection; power 15 mW; power 20 mW; power 35 mW; word length 8 bit; CMOS integrated circuits; Calibration; Clocks; Noise; Redundancy; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location :
San Jose, CA
ISSN :
0886-5930
Print_ISBN :
978-1-4244-5758-8
Type :
conf
DOI :
10.1109/CICC.2010.5617410
Filename :
5617410
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2787865
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