Title :
Divergence Analysis and Optimizations
Author :
Coutinho, Bruno ; Sampaio, Diogo ; Pereira, Fernando Magno Quint ao ; Meira, Wagner, Jr.
Author_Institution :
Dept. of Comput. Sci., Univ. Fed. de Minas Gerais, Belo Horizonte, Brazil
Abstract :
The growing interest in GPU programming has brought renewed attention to the Single Instruction Multiple Data (SIMD) execution model. SIMD machines give application developers a tremendous computational power, however, the model also brings restrictions. In particular, processing elements (PEs) execute in lock-step, and may lose performance due to divergences caused by conditional branches. In face of divergences, some PEs execute, while others wait, this alternation ending when they reach a synchronization point. In this paper we introduce divergence analysis, a static analysis that determines which program variables will have the same values for every PE. This analysis is useful in three different ways: it improves the translation of SIMD code to non-SIMD CPUs, it helps developers to manually improve their SIMD applications, and it also guides the compiler in the optimization of SIMD programs. We demonstrate this last point by introducing branch fusion, a new compiler optimization that identifies, via a gene sequencing algorithm, chains of similarities between divergent program paths, and weaves these paths together as much as possible. Our implementation has been accepted in the Ocelot open-source CUDA compiler, and is publicly available. We have tested it on many industrial-strength GPU benchmarks, including Rodinia and the Nvidia´s SDK. Our divergence analysis has a 34% false-positive rate, compared to the results of a dynamic profiler. Our automatic optimization adds a 3% speed-up onto parallel quick sort, a heavily optimized benchmark. Our manual optimizations extend this number to over 10%.
Keywords :
graphics processing units; optimisation; parallel architectures; program compilers; public domain software; synchronisation; GPU programming; Ocelot; SIMD execution model; branch fusion; divergence analysis; open-source CUDA compiler; optimizations; processing elements; single instruction multiple data; synchronization point; Algorithm design and analysis; Graphics processing unit; Hardware; Logic gates; Optimization; Semantics; Synchronization; CUDA; Compiler; Divergent Execution; GPU; Parallel Execution; SIMD; Static Analysis;
Conference_Titel :
Parallel Architectures and Compilation Techniques (PACT), 2011 International Conference on
Conference_Location :
Galveston, TX
Print_ISBN :
978-1-4577-1794-9
DOI :
10.1109/PACT.2011.63