Title :
A low power high reliability dual-path noise-cancelling LNA for WSN applications
Author :
Hsu, Ming-Yeh ; Wang, Chao-Shiun ; Wang, Chorng-Kuang
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents a dual-path noise-cancelling (DPNC) LNA, which is designed for low power wireless sensor network (WSN) applications and operates at 2.4GHz band. The proposed DPNC LNA can effectively cancel internal circuit noise while consuming less power by gm-boosted technique. The measured voltage gain and NF are 22dB and 3.7dB, respectively. IIP3 is +8dBm and consumes 1.2mW with a 1.0V single supply. Fabricating in the 0.18μm standard CMOS process, the LNA occupies an active area of 0.3mm2.
Keywords :
CMOS integrated circuits; integrated circuit noise; integrated circuit reliability; low noise amplifiers; low-power electronics; wireless sensor networks; WSN applications; dual-path noise-cancelling LNA; frequency 2.4 GHz; gain 22 dB; internal circuit noise; low noise amplifier; noise figure 3.7 dB; power 1.2 mW; size 0.18 mum; standard CMOS process; voltage 1 V; voltage gain; wireless sensor networks; CMOS integrated circuits; CMOS technology; Impedance matching; Noise; Noise figure; Thermal noise; Wireless sensor networks;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-5758-8
DOI :
10.1109/CICC.2010.5617451
