Title :
SuperChip packaging issues for advanced signal processors
Author :
Hurt, Paula R. ; Massaron, Laurence I. ; Hamilton, Paul J.
Author_Institution :
TRW, Redondo Beach, CA, USA
Abstract :
TRW is developing a miniaturized microelectronic, high-performance vector signal processor (VSP) for use in next-generation spaceborne processors and computer workstations. The VSP consists of a monolithic very-high-speed integrated circuit (VHSIC) wafer scale device, the CPUAX (Central Processing Unit Arithmetic eXtended) SuperChip, and two very complex multichip modules, the Control Memory and the Vector Memory. The authors discuss the issues related to packaging the large, high-performance, low-voltage, high-speed digital monolithic VHSIC wafer scale CPUAX SuperChip. Eight packaged CPUAX SuperChips underwent full functional tests on a Hewlett Packard 8200 system with a customized high-speed interface board. All macrocells responded optimally over the full ranges of power (3.0 to 3.3 volts) and temperature (-55 to+125°C), and at frequencies up to 90 MHz. Some response degradation was noticed between 90 and 100 MHz
Keywords :
VLSI; integrated circuit testing; microprocessor chips; packaging; -55 to 125 C; 100 MHz; 3.0 to 3.3 V; CPUAX; Central Processing Unit Arithmetic eXtended; SuperChip; TRW; VHSIC; VSP; WSI; advanced signal processors; computer workstations; frequencies; functional tests; macrocells; monolithic chip; next-generation spaceborne processors; packaging; packaging issues; temperature; vector signal processor; wafer scale device; wafer scale integration; Arithmetic; Central Processing Unit; Centralized control; Integrated circuit packaging; Microelectronics; Multichip modules; Signal processing; System testing; Very high speed integrated circuits; Workstations;
Conference_Titel :
Wafer Scale Integration, 1992. Proceedings., [4th] International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-8186-2482-5
DOI :
10.1109/ICWSI.1992.171791
