Architecture and performance of a large area multiprocessor system for real-time video processing

The performance of multiprocessor architectures for real-time video processing applications, consisting of bus connected identical processing elements, is discussed. The regular structure of such architectures supports a large area integration. The performance of a large area implementation of the architectures is analyzed and discussed dependent on the controlling mode with respect to the processing of basic video coding algorithms. The main problems are data supply, controlling, and processing of data dependent algorithms. Due to the specific I/O constraints of large area circuits and for computation intensive video coding applications it is shown that MIMD (multiple instruction, multiple data) controlling provides a higher utilization of the arithmetic resources than SIMD (single instruction, multiple data)