Title :
A 2.6Gb/s 1.56mm2 near-optimal MIMO detector in 0.18µm CMOS
Author :
Kim, Tae-Hwan ; Park, In-Cheol
Author_Institution :
Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Abstract :
This paper presents a pipelined MIMO detector designed for 4×4 16-QAM spatial multiplexing systems. A modified Dijkstra´s algorithm and a pre-calculation technique are proposed to improve the throughput up to 2.6Gb/s, and the Euclidean norm computation is approximated to reduce the chip area without degrading the error-rate performance. The entire detector occupies 1.56mm2 in a 0.18μm CMOS process, and shows a near-optimal error-rate performance. In achieving a BER of 10-3, the performance of the proposed detector is only 0.1dB away from that of the optimal detection in terms of SNR.
Keywords :
CMOS integrated circuits; MIMO communication; error statistics; quadrature amplitude modulation; space division multiplexing; 16-QAM spatial multiplexing systems; BER; CMOS process; Euclidean norm computation; bit rate 2.6 Gbit/s; modified Dijkstra algorithm; near-optimal MIMO detector; near-optimal error-rate performance; size 0.18 mum; Bit error rate; Complexity theory; Detectors; MIMO; Signal processing algorithms; Signal to noise ratio; Throughput;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-5758-8
DOI :
10.1109/CICC.2010.5617463
