DocumentCode
2788870
Title
A crosstalk-and-ISI equalizing receiver in 2-drop single-ended SSTL memory channel
Author
Jun-Hyun Bae ; Sohn, Young-Soo ; Bae, Jun-Hyun ; Kwang-Il Park ; Choi, Joo-Sun ; Jun, Young-Hyun ; Sim, Jae-Yoon ; Park, Hong-June
Author_Institution
Dept. EE, POSTECH, Pohang, South Korea
fYear
2010
fDate
19-22 Sept. 2010
Firstpage
1
Lastpage
4
Abstract
An equalizer circuit which minimizes both crosstalk and ISI is applied to a receiver with a strongly-coupled 2-parallel 2drop single-ended microstrip SSTL memory channel. The crosstalk equalizer adds a crosstalk-canceling pulse to a victim receiver signal to make the signal crosstalk-free during the transition interval of an incoming signal. A DFE is used for ISI compensation. The equalization of both crosstalk and ISI increases the data rate for BER <; 1E-12 from 2.5Gbps to 3.6Gbps with a 0.18μm CMOS process.
Keywords
CMOS integrated circuits; crosstalk; equalisers; intersymbol interference; receivers; 2-drop single-ended SSTL memory channel; CMOS process; crosstalk-and-ISI equalizing receiver; receiver signal; size 0.18 mum; Bit error rate; Crosstalk; Decision feedback equalizers; Microstrip; Receivers; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location
San Jose, CA
ISSN
0886-5930
Print_ISBN
978-1-4244-5758-8
Type
conf
DOI
10.1109/CICC.2010.5617470
Filename
5617470
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