DocumentCode :
2788877
Title :
Communication Architectures for Dynamically Reconfigurable FPGA Designs
Author :
Pionteck, Thilo ; Albrecht, Carsten ; Koch, Roman ; Maehle, Erik ; Hubner, Michael ; Becker, Juirgen
Author_Institution :
Inst. of Comput. Eng., Univ. of Lubeck
fYear :
2007
fDate :
26-30 March 2007
Firstpage :
1
Lastpage :
8
Abstract :
This paper gives a survey of communication architectures which allow for dynamically exchangeable hardware modules. Four different architectures are compared in terms of reconfiguration capabilities, performance, flexibility and hardware requirements. A set of parameters for the classification of the different communication architectures is presented and the pro and cons of each architecture are elaborated. The analysis takes a minimal communication system for connecting four hardware modules as a common basis for the comparison of the diverse data given in the papers on the different architectures.
Keywords :
field programmable gate arrays; logic design; reconfigurable architectures; communication architectures; exchangeable hardware modules; field programmable gate arrays; minimal communication system; reconfigurable FPGA design; Bandwidth; Communication networks; Computer architecture; Delay; Field programmable gate arrays; Hardware; Joining processes; Network-on-a-chip; Runtime; Scalability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International
Conference_Location :
Long Beach, CA
Print_ISBN :
1-4244-0910-1
Electronic_ISBN :
1-4244-0910-1
Type :
conf
DOI :
10.1109/IPDPS.2007.370364
Filename :
4228092
Link To Document :
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