• DocumentCode
    2789034
  • Title

    FPGA Implementations of Cube Neutral Key Bits Analysis on Block Cipher EPCBC

  • Author

    ChunBo Ma ; Lei Wei

  • Author_Institution
    Sch. of Inf. & Commun., Guilin Univ. of Electron. Technol., Guilin, China
  • fYear
    2015
  • fDate
    24-26 April 2015
  • Firstpage
    750
  • Lastpage
    754
  • Abstract
    This paper aims to present cube neutral bit tester on EPCBC. Cube neutral bit tester is a generic class of methods for building distinguishers, which find function approximating F(K, V) that depend on less than all key bits. We demonstrate how to use an efficient FPGA implementation cube neutral bit tester on the block cipher EPCBC. Different from the previous kinds of attack, the primary purpose of our study is to detect whether a single key bit ki influences the output of F or not. Our experiment showed that reduced to 8-round for EPCBC-48 and 8-round for EPCBC-96 output cumulative bits involve in all bits information of master key, there is no neutral key bits. The results indicate that the full-round EPCBC is steady for key information diffusivity and confusion to resist the classic cube attack.
  • Keywords
    cryptography; field programmable gate arrays; 8-round; EPCBC-48; EPCBC-96 output cumulative bits; FPGA implementation; bits information; block cipher EPCBC; classic cube attack; cube neutral key bits tester; distinguishers; function approximating; master key; Ciphers; Encryption; Field programmable gate arrays; Hardware; Polynomials; Schedules; Cube Attack; EPCBC; FPGA implementation; Neutral key bit;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Science and Control Engineering (ICISCE), 2015 2nd International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4673-6849-0
  • Type

    conf

  • DOI
    10.1109/ICISCE.2015.173
  • Filename
    7120713