The performance impact of vector processor cashes

To accurately evaluate the performance impact of a vector cache, the authors simulate three vector processor designs, each of which is derived from expected technology changes applied to the Ardent Titan. The simulator is an accurate timing model incorporating the necessary aspects of the processor, cache, and memory system. It is found that current trends in memory and processor performance lead to increasingly severe memory speed and bandwidth limitations. Either of two designs using large cache memories (2MB, 4MB) on the average double processor performance relative to a design without a cache. Hit ratios for almost all of the programs used in the simulations, drawn from real Ardent workloads, are over 99%. Based on this work, it is recommended that future supercomputers incorporate large caches for both vector and scalar data