A 140mA 90nm CMOS low drop-out regulator with −56dB power supply rejection at 10MHz

A high power supply rejection (PSR) low drop-out (LDO) voltage regulator employing a simple supply ripple cancellation adaptive technique is presented in this paper. The LDO is implemented in 90nm digital CMOS process and occupies an active area of 0.015mm². The measured PSR is better than -50dB up to 10MHz across the load current range of 140mA with a drop-out voltage of 0.15V. The quiescent current (I_Q) varies adaptively from 33μA at no load to 145μA at maximum load with a current efficiency of 99.9%. Load regulation of 6mV for a 140mA step in load current is measured.