Title :
A 2.4ps resolution 2.1mW second-order noise-shaped time-to-digital converter with 3.2ns range in 1MHz bandwidth
Author :
Young, Brian ; Kwon, Sunwoo ; Elshazly, Amr ; Hanumolu, Pavan Kumar
Author_Institution :
Sch. of EECS, Oregon State Univ., Corvallis, OR, USA
Abstract :
A time-to-digital converter (TDC) employs a phase-reference second-order continuous-time delta-sigma modulator to achieve high resolution and low power. The modulator operates on the phase of the input signal and generates an equivalent noise-shaped one-bit output data stream. Fabricated in an LP 90nm CMOS process, the prototype TDC achieves better than 2.4ps resolution over a 3.2ns range in a 1MHz signal bandwidth while consuming 2.1mW from a 1.2V supply.
Keywords :
CMOS digital integrated circuits; delta-sigma modulation; noise; CMOS process; equivalent noise-shaped one-bit output data stream; phase-reference second-order continuous-time delta-sigma modulator; power 2.1 mW; second-order noise-shaped time-to-digital converter; signal bandwidth; size 90 nm; Converters; Delay; Detectors; Phase frequency detector; Phase locked loops; Phase modulation; Signal resolution;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-5758-8
DOI :
10.1109/CICC.2010.5617612
