Title :
Mass Data Recorder with Ultra-High-Density Stacked Memory for Spacecraft
Author :
Sasada, T. ; Ichikawa, S. ; Shirakura, M.
Author_Institution :
Japan Aerosp. Exploration Agency, Tsukuba Space Center
Abstract :
In 1999, Japan Aerospace Exploration Agency (JAXA) began developing a high-speed, large-volume and low-power-consumption solid state recorder (SSR) for space-use. This aim was to develop a SSR for installation in Earth observation satellites that could store and process large amounts of data. A prototype of the SSR was completed in spring 2004, and an engineering model is currently being constructed. The main features of the SSR are 200GBytes capacity, 2.5Gbps data transmission speed, low weight (25kg) and low power consumption (120W). Stacked 512Mbits synchronous dynamic random access memory (SDRAM) with on-board multi-bit error detection and correction (EDAC) mechanism, as well as a CompactPCI bus for fast data exchange, are used to improve the efficiency of data collection and storage capabilities. In this paper, we describe the main feature of the SSR system, and the technologies used in its development and manufacture. Preliminary results of several system tests are also reported
Keywords :
DRAM chips; SRAM chips; data recording; error correction; error detection; field buses; space vehicle electronics; space vehicles; 120 W; 2.5 Gbit/s; 200 GBytes; 25 kg; CompactPCI bus; EDAC mechanism; Earth observation satellites; SDRAM; SSR system; data exchange; data transmission speed; error detection and correction mechanism; mass data recorder; power consumption; solid state recorder; spacecraft; synchronous dynamic random access memory; ultrahigh-density stacked memory; Artificial satellites; Data communication; Design engineering; Energy consumption; Power engineering and energy; Prototypes; SDRAM; Solid state circuits; Space vehicles; Springs;
Conference_Titel :
Aerospace Conference, 2005 IEEE
Conference_Location :
Big Sky, MT
Print_ISBN :
0-7803-8870-4
DOI :
10.1109/AERO.2005.1559545
