Title :
Structured ASIC Design for Space Systems Applications
Author :
Bansal, Jai ; Orlowsky, Brian ; Rockett, Leonard
Author_Institution :
BAE Syst., Manassas, VA
Abstract :
As integrated circuit dimensions scale downward the costs of the photolithographic masks used to manufacture microcircuits are becoming prohibitively high. And in today´s highly competitive business environment, time to market is increasingly critical. Custom standard-cell ASICs are on the wrong side of these dynamics with their long lead times and the need to build a full mask set per part number. Structured ASICs offer an attractive alternative. Structured ASICs are developed from an inventoried base masterslice chip design by using generally only a few back-end masking levels to personalize the resulting ASIC function, saving mask costs and shortening lead times per circuit design. Structured ASICs strategically fill the trade space between FPGAs and custom ASICs. BAE Systems has developed a radiation hardened structured ASIC product offering for next-generation advanced military and space applications
Keywords :
application specific integrated circuits; integrated circuit design; space vehicle electronics; ASIC function; FPGA; back-end masking levels; masterslice chip design; radiation hardening; space systems; standard-cell ASIC; structured ASIC design; Application specific integrated circuits; Bridge circuits; CMOS technology; Cost function; Electronic design automation and methodology; Field programmable gate arrays; Logic design; Production; Radiation hardening; Space technology;
Conference_Titel :
Aerospace Conference, 2005 IEEE
Conference_Location :
Big Sky, MT
Print_ISBN :
0-7803-8870-4
DOI :
10.1109/AERO.2005.1559552