Library based hierarchical power estimation method using in/out transition activity

Hierarchical power estimation of CMOS circuits based on the input/output transition activity of the circuit is introduced. For this purpose, an input/output transition table (IOTT) is drawn for each of a set of library circuits. The transition energy for each library circuit is calculated using HSPICE and saved in the input/output transition table. Using this approach, internal node power consumption is fully covered for small circuits such as inverter, nor, nand and xor. For larger circuits, such as a full adder, internal node energy consumption is captured at least 70% for the states observed from the input/output transition table. Using this technique, one can quickly estimate the power for large circuits. Results show that this method is two orders of magnitude faster than SPICE simulations with less than 5% error