Title :
Exploring performance tradeoffs for clustered VLIW ASIPs
Author :
Jacome, M.F. ; de Veciana, G. ; Lapinskii, V.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
VLIW ASIPs provide an attractive solution for increasingly pervasive real-time multimedia and signal processing embedded applications. In this paper we propose an algorithm to support trade-off exploration during the early phases of the design/specialization of VLIW ASIPs with clustered datapaths. For purposes of an early exploration step, we define a parameterized family of clustered datapaths D(m,n), where m and n denote interconnect capacity and cluster capacity constraints on the family. Given a kernel, the proposed algorithm explores the space of feasible clustered datapaths and returns: a datapath configuration; a binding and scheduling for the operations; and a corresponding estimate for the best achievable latency over the specified family. Moreover, we show how the parameters m and n, as well as a target latency optionally specified by the designer, can be used to effectively explore trade-offs among delay, power/energy, and latency. Extensive empirical evidence is provided showing that the proposed approach is strikingly effective at attacking this complex optimization problem.
Keywords :
application specific integrated circuits; embedded systems; multimedia systems; parallel architectures; signal processing; clustered VLIW ASIPs; clustered datapaths; complex optimization problem; datapath configuration; performance tradeoffs; real-time multimedia; scheduling; signal processing embedded applications; target latency; Application specific processors; Clustering algorithms; Costs; Delay; Kernel; Power dissipation; Registers; Signal processing algorithms; Space exploration; VLIW;
Conference_Titel :
Computer Aided Design, 2000. ICCAD-2000. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-6445-7
DOI :
10.1109/ICCAD.2000.896523