Title :
Efficiency of power devices using full Cu metallization technologies
Author :
Kobori, Etsuyoshi ; Izumi, Naoki ; Kumamoto, Nobuhisa ; Hamazawa, Yasushi ; Matsumoto, Muneyuki ; Yamamoto, Koji ; Kamisawa, AKira
Author_Institution :
ULSI Res. & Dev. Headquarters, Rohm Co. Ltd., Kyoto, Japan
Abstract :
This paper describes some advantages of Cu dual damascene structures for power LSI devices. By using the Cu process, a lower value of Vsat was obtained than that using Al-Si-Cu wiring. The lifetime of Cu lines was about 10 times longer than when using Al-Cu lines. The on-resistance of DMOS is reduced by as much as 31% when using the Cu process
Keywords :
MOS integrated circuits; copper; electric resistance; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; large scale integration; power integrated circuits; Al-Cu lines; Al-Si-Cu wiring; AlCu; AlSiCu; Cu; Cu dual damascene structures; Cu line lifetime; Cu lines; Cu metallization technology; Cu process; DMOS; on-resistance; power LSI devices; power device efficiency; saturation voltage; Chemicals; Copper; Metallization; Research and development; Sputter etching; Sputtering; Tin; Ultra large scale integration; Wiring; X-ray scattering;
Conference_Titel :
Power Semiconductor Devices and ICs, 1999. ISPSD '99. Proceedings., The 11th International Symposium on
Conference_Location :
Toronto, Ont.
Print_ISBN :
0-7803-5290-4
DOI :
10.1109/ISPSD.1999.764053
