• DocumentCode
    2793720
  • Title

    [Copyright notice]

  • fYear
    2011
  • fDate
    9-11 Nov. 2011
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    The following topics are dealt with: equivalence checking; formal verification; silicon validation; reliable design; and validation techniques.
  • Keywords
    formal verification; network synthesis; reliability; design reliability; equivalence checking; formal verification; silicon validation; validation techniques;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Level Design Validation and Test Workshop (HLDVT), 2011 IEEE International
  • Conference_Location
    Napa Valley, CA
  • ISSN
    1552-6674
  • Print_ISBN
    978-1-4577-1744-4
  • Type

    conf

  • DOI
    10.1109/HLDVT.2011.6114158
  • Filename
    6114158
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2793720