Title :
[Copyright notice]
Abstract :
The following topics are dealt with: equivalence checking; formal verification; silicon validation; reliable design; and validation techniques.
Keywords :
formal verification; network synthesis; reliability; design reliability; equivalence checking; formal verification; silicon validation; validation techniques;
Conference_Titel :
High Level Design Validation and Test Workshop (HLDVT), 2011 IEEE International
Conference_Location :
Napa Valley, CA
Print_ISBN :
978-1-4577-1744-4
DOI :
10.1109/HLDVT.2011.6114158
